October 23, 2025
Bldg 201, Rm 102
America/Chicago timezone

Admin Contact: Samantha Tezak

The future generation of computational hardware has added significant computational capability in precisions lower than double precision (64 bit). Modern high-end GPUs have also started to reduce the silicon area dedicated to 64-bit computation, resulting in stagnation or reductions in high-precision performance on a per-GPU basis. In order for high performance computation codes to continue performance improvement on new hardware, application developer must consider the user of lower precision computation. This workshop is an introduction into topic of mixed precision in HPC with presentations on application usage, numerics, and tools.

The workshop is planned to be series of a few workshops with the initial workshop focused within the Argonne computing staff and then growing to larger workshop involving the wider community and vendors.

Conference information

Date/Time

Starts

Ends

All times are in America/Chicago

Location

Bldg 201, Rm 102
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